1. Field of the Invention
The invention relates to a computer system having CMOS memory for storing system configuration parameters and more particularly to a circuit that allows the CMOS memory to switch into low power mode automatically when the personal computer system is turned off.
2. Description of the Related Art
As personal computers have become more powerful, the amount of configuration information needed for the initialization of the computer systems have also increased. When International Business Machines Corporation (IBM) introduced the PC/AT, its second major generation of personal computers, one of the components used in the computer was a small CMOS memory. A real time clock (RTC) was also provided in the computer systems to perform real time clock functions. Because of the relatively limited capabilities of the PC/AT, which utilized the bus standard now known as the Industry Standard Architecture (ISA), a small CMOS memory unit was deemed sufficient to store the system configuration information. However, as personal computers became progressively more powerful, the basic CMOS memory unit no longer had the storage capacity for all the system configuration parameters required. As a result, an extended CMOS memory area was added to the personal computer systems. Generally, the size of each of the basic CMOS memory area and the extended CMOS memory area was 64 bytes.
As computer system components grew ever more powerful, a new bus standard known as the Extended Industry Standard Architecture (EISA) was developed to take advantage of the extra options and features available from the components. An EISA computer system includes a 32-bit address bus, a 32-bit data bus and expansion slots that are capable of accepting both EISA and ISA expansion boards. One of the features available in EISA systems is the capability of providing for automatic configuration for the system board, expansion boards plugged into the expansion bus, peripheral devices built into the system board, and software drivers that use system resources. To support automatic configuration by the system, the system board and the expansion boards each include a configuration file that contains the expansion ID, system resource requirements, and initialization information. The configuration files are utilized by a configuration utility provided with the EISA system to resolve conflicts in assignments of system resources, such as interrupt levels and DMA channels, and also to extract initialization information that is used for system board and expansion board initialization. The extracted initialization information for the system and expansion boards are stored in a nonvolatile memory by the configuration utility.
To store the expansion board ID, system resource requirements and initialization information for the system board and all the expansion board devices in the EISA system and other desired configuration and status information, approximately 8K bytes of memory capacity is required. An EEPROM has typically been used in systems to store the EISA configuration information because of its ability to retain data when the computer system power supply voltage is removed. However, because of the relatively high cost of the EEPROM, the computer system according to the preferred embodiment of the present invention uses a low-power 8 KB SRAM to store the EISA configuration information. However, a problem associated with the use of an SRAM is that it is a non-volatile memory. Thus, if the computer system power supply voltage is removed from the SRAM, all data in the SRAM would be lost. To avoid such loss of data, it would be desirable to connect the SRAM to an alternative source of power when the computer system power is turned off. As noted above, an RTC and basic and extended CMOS memory are provided with the computer system. Since these devices must also be provided with a supply voltage when the computer is shut off, a battery is provided with the computer system to provide an alternate power source. One alternative to provide this battery power has been taken by Dallas Semiconductor, which places a lithium battery inside the package containing the RTC/CMOS memory units and includes the additional SRAM needed for an EISA system. However, this alternative is even more expensive than the use of EEPROM but is used in instances where the limited number of write cycles to an EEPROM is a concern.
In current systems, power conservation is goal, so the use of 3.3V components is becoming more common. In these systems, the voltage provided to the RTC/CMOS memory units is typically clamped at 3.3V when the computer is on. When the computer is shut off, the battery is immediately connected to the RTC/CMOS memory for the devices to remain functional. This battery used to power the RTC/CMOS memory units can be used to supply the SRAM when the computer system power is disconnected, but it is necessary to use an SRAM with a low power, low voltage data retention mode to avoid loss of data stored in the SRAM and to avoid draining the battery. The SRAMs include a chip enable input that if deasserted, places the SRAM into a low power standby mode. It has been found that if the SRAM is not placed in the low power mode prior to reducing the voltage to that of the RTC/CMOS memory battery, data loss in the SRAM may occur. Therefore, it is desired that a circuit be developed that automatically places the SRAM into a low power state before the power supply input voltage is decreased from the computer system supply to the RTC voltage.